1. Field of the Invention
The present invention relates to a receiving device for a spread spectrum communication system.
2. Description of Related Art
Recently, a system which adopts wireless communication such as a cordless telephone, a portable telephone or a mobile communication has been rapidly spreading and much attention has been focused on a spread spectrum communication system. Further, a CDMA (Code Division Multiple Access) which is a multiple access (Multiple Access) method using the spread spectrum communication system has gained attention as a fundamental technique of a portable telephone system for the next generations.
In the CDMA system, transmission signals are subjected to a narrow-band modulation and the modulated waves by this narrow-band modulation are converted into transmission signals of broad band by performing the spectrum spreading with the spread code sequence and the transmission signal in the broad band are transmitted to the receptions side. In the reception side, the received signals are inversely spread with the spread code sequence so as to generate the inverse spreading output. By detecting and demodulating this inverse spreading output, the signals transmitted from the transmission side can be reproduced.
The transmission and the reception are performed in the transmission side and the reception side by spread processings which are inverted from each other as described above. In the receiving device provided in the conventional portable telephone, a DLL (Delayed Locked Loop) circuit having the structure shown in FIG. 1 is used in order to ensure the synchronism with the received signals.
The conventional DLL circuit shown in FIG. 1 is provided with a spread code sequence generator 1, inversion spread circuits 2, 3, 4, integrators 5, 6, 7 and an adder-subtractor 8.
Here, the spread code sequence generator 1 generates spread code sequence DPC, DEC and DLC of PN series (Pseudorandom Noise) which are subjected to the phase control in response to error signals Epe outputted from the adder-subtractor 8. That is, the spread code sequence generator 1 outputs the spread code sequence DPC which is used to actually perform the inverse spreading of the received signals Din, the spread code sequence (called xe2x80x9cEarly Codexe2x80x9d) DEC whose phase is advanced or lead by a half chip from the spread code sequence DPC and the spread code sequence (called xe2x80x9cLate Codexe2x80x9d) DLC whose phase is delayed by a half chip from the spread code sequence DPC.
The inversion spread circuit 4 obtains the cross correlation P between the received signals Din and the inverse spread code sequence DPC and the integrator 7 generates a detection output Dout by integrating the correlation output P.
The inverse spreading circuits 2, 3 obtain respective cross correlations E, L between the received signals Din and the spread code sequence DLC, DEC and the integrators 5, 6 integrate respective correlation outputs E, L and supply them to the adder-subtractor 8.
Accordingly, error signals Epe indicative of the difference of respective integrated values of the correlation outputs E, L are outputted from the adder-subtractor 8. Then, the phase control of the spread code sequence generator 1 is fedback by this error signals Epe so that the spread code sequence DPC, DEC, DLC which ensure the synchronism with the received signals Din can be generated. At the same time, the correlation output (inverse spreading output) P and the detection output Dout which are synchronous with the received signals Din can be also obtained.
However, the above-mentioned DLL circuit further requires two inverse spreading circuits 2, 3 and two integrators 5, 6 respectively to ensure the synchronism with the received signals Din in addition to the inverse spreading circuit 4 and the integration circuit 7 for performing the inverse spreading and the detection of the received signals Din and hence, there has been a problem that the scale of the circuit has become large-sized.
Particularly, in the receiving device of RAKE system which positively utilizes multiple paths, for example, in the receiving device having N pieces of multiple paths, it becomes necessary to ensure 3 N pieces of the inverse spreading circuits and the integration circuits and hence, there has been a problem that the circuit scale becomes large-sized.
The present invention has been made to overcome the above-mentioned problems and it is an object of the present invention to provide a receiving device which is capable of miniaturizing the scale of the circuit.
To achieve the above-mentioned objects of the present invention, a receiving device for a spread spectrum communication system according to a first aspect of the present invention includes a correlation arithmetic part which performs a cross correlation arithmetic between a code sequence and a received signal, an integrator which integrates a correlation output generated by the above-mentioned correlation arithmetic part, a holding part which holds an integrated output generated by the integrator, an error detector for generating an error signal indicative of a phase difference between the code sequence and the received signal based on a holding signal held by the holding part, code sequence generator which performs a phase control opertion in such a way that the code sequence is made to match in phase with the received signal based on the error signal generated by the error detector and supplies a phase-controlled code sequence to the correlation arithmetic part, wherein the correlation arithmetic part performs a cross correlation arithmetic between data other than original data which is included in the received signal and the code sequence and a cross correlation arithmetic of the original data included in the received signal and the code sequence in a time-sharing fashion, and the holding part holds an integrated output outputted from the integrator when the correlation arithmetic part performs the cross correlation arithmetic between the data other than the original data which is included in the received signal and the code sequence.
With such a structure, an inverse spreading processing and a detection processing of the original data included in the received signals, and an inverse spreading processing and a detection processing of data other than the original data included in the received signal are performed in a time-sharing fashion using one correlation arithmetic part and one integrator. That is, the holding parts holds the integrated outputs obtained by performing the inverse spreading and the integration processing of the data other than the original data included in the received signal, and further, the error detector detects the actual phase difference between the received signal and the code sequence based on the holding signal and outputs the error signal. Based on this error signal, the code sequence generator adjusts the phase of the code sequence so as to ensure the synchronization with the received signal, and further, the above-mentioned correlation arithmetic part and the integrator perform the inverse spreading and the integration processing of the original data included in the received signal based on the adjusted code sequence.
Since the processing to ensure the synchronization with the received signal and the processing to perform the inverse spreading and the detection of the original data in the received signal based on the synchronization-ensured code sequence can be performed by one correlation arithmetic part and one integrator, a receiving device having fewer parts and a circuit of a reduced scale can be realized.
A receiving device in a spread spectrum communication system according to a second aspect of the present invention includes a correlation arithmetic part which performs a cross correlation arithmetic between a code sequence and a received signal, an integrator which integrates correlation outputs generated by the above-mentioned correlation arithmetic part, a holding part which holds an integrated output generated by the integrator, a code sequence generator which outputs the code sequence by performing a phase control operation based on a holding signal held by the holding part such that the code sequence is made to match in phase with the received signal and also outputs a delay code sequence which is delayed from the code sequence by a given phase and a leading code sequence which leads the code sequence by the given phase, and an adder-subtractor which generates a dofferetial code sequence of difference between the delay code sequence and the leading code sequence which are outputted from the code sequence generator, wherein the correlation arithmetic part performs a cross correlation arithmetic between data other than an original data which is included in the received signal and the code sequence of difference and a cross correlation arithmetic of the original data included in the received data and the code sequence in a time-sharing fashion, and the holding parts holds an integrated output outputted from the integrator when the correlation arithmetic part performs the cross correlation arithmetic between the data other than the original data which is included in the received signal and the differential code sequence.
With such a structure, an inverse spreading processing and a detection processing of the original data included in the received signal and an inverse spreading processing and a detection processing of data other than the original data included in the received signal are performed in a time-sharing fashion using one correlation arithmetic part and one integrator, and the holding part holds the integrated output which is generated by the inverse spreading processing and the detection processing of the data other than the original data contained in the received signal. Based on the holding signal which is held by this holding part, the code sequence generator outputs the code sequence by performing the phase control in such a way that the code sequence is made to match in phase with the received signal and outputs the delay code sequence which is delayed from the code sequence by a given phase and the leading code sequence which leads the code sequence by the given phase. Then, the adder-subtractor generates the differential code sequence of the difference between the delay code sequence and the leading code sequence.
With such a structure, the correlation arithmetic part and the integrator perform the inverse spreading processing and the detection processing of the differential code sequence and the data other than the original data included in the received signal, and the code sequence generator performs the tracking of the synchronization to the received signal based on the holding signal generated by such processing. Further, the correlation arithmetic part and the integrator repeat the processing consisting of inverse spreading processing and the detection processing of the code sequence which is synchronously tracked and the original data which is contained in the received signal.
In this manner, since the processing to ensure the synchronism with the received signals and the processing to inversely spread and detect the original data in the received signal with the synchronism-ensured code sequence can be performed by one correlation arithmetic part and one integrator, the receiving device having a small number of parts and a circuit of a reduced scale can be realized.
A receiving device in a spread spectrum communication system according to a third aspect of the present invention includes code sequence generator which generates a code sequence, a phase-delay code sequence which is delayed from the code sequence by a given phase and a phase-leading code sequence which leads the code sequence by the given phase, and outputs the code sequences, adder-subtractor which generates a differential code sequence of the difference between the phase-delay code sequence and the phase-leading code sequence outputted from the code sequence generator, first correlation arithmetic part which performs the cross correlation arithmetic between the differential code sequence and the received signal, an integrator which integrates a correlation output generated by the first correlation arithmetic part, and second correlation arithmetic part which performs cross correlation arithmetic between the code sequence and the received signal, wherein the code sequence generator performs a phase control based on integrated outputs outputted from the integratior such that the code sequence, the phase-delay code sequence and the phase-leading code sequence are made to match in phase with the received signal and outputs the the phase controlled code sequences.
With such a structure, the first correlation arithmetic part, the integrator, the code sequence generator and the adder-subtractor perform the processing for ensuring the synchronization with the received signal, and second correlation arithmetic part performs the correlation arithmetic between the synchronization-ensured code sequence which is outputted from the code sequence generator and the received signals so that the received signal can be inversely spread accurately.
In this manner, with the provision of merely two pieces of correlation arithmetic parts, the processing to ensure the synchronism with the received signal and the processing to perform the inverse spreading of the received signal using the synchronization-ensured code sequence can be performed and hence, a receiving device having a small number of parts and a circuit of a reduced scale can be realized.